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 PD - 94348A
HEXFET(R) POWER MOSFET SURFACE MOUNT (SMD-1)
IRL7N1404 40V, N-CHANNEL
Product Summary
Part Number
IRL7N1404 BVDSS
40V
RDS(on) 0.006
ID 55A*
Seventh Generation HEXFET(R) power MOSFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon unit area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. These devices are well-suited for applications such as switching power supplies, motor controls, inverters, choppers, audio amplifiers and high-energy pulse circuits.
SMD-1
Features:
n n n n n n n n n
Low RDS(on) Avalanche Energy Ratings Dynamic dv/dt Rating Simple Drive Requirements Ease of Paralleling Hermetically Sealed Light Weight Surface Mount LogicGate Drive
Absolute Maximum Ratings
Parameter
ID @ VGS = 10V, TC = 25C ID @ VGS = 10V, TC = 100C IDM PD @ TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction Storage Temperature Range Package Mounting Surface Temp. Weight * Current is limited by package For footnotes refer to the last page 55* 55* 220 100 0.8 20 300 55 10 2.0 -55 to 150 300 (for 5s) 2.6 (Typical)
Units A
W
W/C
V mJ A mJ V/ns
o
C
g
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1
04/26/02
IRL7N1404
Electrical Characteristics @ Tj = 25C (Unless Otherwise Specified)
Parameter
BVDSS Drain-to-Source Breakdown Voltage BV DSS/T J Temperature Coefficient of Breakdown Voltage RDS(on) Static Drain-to-Source On-State Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance IDSS Zero Gate Voltage Drain Current
Min
40 -- -- -- 1.0 93 -- -- -- -- -- -- -- -- -- -- -- --
Typ Max Units
-- 0.041 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 4.0 -- -- 0.006 0.008 3.0 -- 20 250 200 -200 115 37 45 40 356 63 96 -- V V/C V S( ) A
Test Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 1.0mA VGS = 10V, ID = 55A VGS = 4.5V, ID = 55A VDS = VGS, ID = 250A VDS =10V, IDS = 55A VDS = 40V ,VGS=0V VDS = 32V, VGS = 0V, TJ =125C VGS = 20V VGS = -20V VGS =5.0V, ID = 55A VDS = 32V VDD = 20V, ID = 55A, VGS = 5.0V, RG = 2.5
IGSS IGSS Qg Q gs Q gd td(on) tr td(off) tf LS + LD l Ciss C oss C rss
Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (`Miller') Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance
nA nC
ns
nH
Measured from the center of drain pad to the center of source pad VGS = 0V, VDS = 25V f = 1.0MHz
Input Capacitance Output Capacitance Reverse Transfer Capacitance
-- -- --
6470 1600 165
-- -- --
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS ISM VSD t rr QRR ton Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min Typ Max Units
-- -- -- -- -- -- -- -- -- -- 55* 220 1.3 125 230
Test Conditions
A
V ns nC Tj = 25C, IS = 55A, VGS = 0V Tj = 25C, IF = 55A, di/dt 100A/s VDD 25V
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
* Current is limited by package
Thermal Resistance
Parameter
RthJC Junction-to-Case
Min Typ Max Units
-- -- 1.25
C/W
Test Conditions
Note: Corresponding Spice and Saber models are available on the G&S Website. For footnotes refer to the last page
2
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IRL7N1404
1000
VGS TOP 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.3V
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.3V TOP
ID, Drain-to-Source Current (A)
4.3V
ID, Drain-to-Source Current (A)
4.3V
100
100
20s PULSE WIDTH Tj = 25C
10 0.1 1 10 100
20s PULSE WIDTH Tj = 150C
10 0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
R DS(on) , Drain-to-Source On Resistance (Normalized)
ID = 55A
I D , Drain-to-Source Current (A)
1.5
TJ = 25 C TJ = 150 C
1.0
0.5
100 4.0
15
V DS = 15V 20s PULSE WIDTH 5.5 6.0 4.5 5.0 6.5
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRL7N1404
10000
VGS , Gate-to-Source Voltage (V)
8000
VGS = Ciss = Crss = Coss = 0V, f = 1MHz Cgs + Cgd , Cds SHORTED Cgd Cds + Cgd
20
ID = 55A
16
C, Capacitance (pF)
Ciss
6000
VDS = 32V VDS = 20V VDS = 8V
12
4000
C oss
8
2000
4
C rss
0 1 10 100
0 0 50 100
FOR TEST CIRCUIT SEE FIGURE 13
150 200 250
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
ISD , Reverse Drain Current (A)
100
TJ = 150 C
ID, Drain-to-Source Current (A)
100
100s
1ms
10 Tc = 25C Tj = 150C Single Pulse 1 0.1 1 10 100 VDS , Drain-toSource Voltage (V)
10
TJ = 25 C V GS = 0 V
0.6 1.0 1.4 1.8
10ms
1 0.2
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRL7N1404
100
LIMITED BY PACKAGE
VGS
80
V DS
RD
D.U.T.
+
I D , Drain Current (A)
RG
-V DD
60
VGS
Pulse Width 1 s Duty Factor 0.1 %
40
Fig 10a. Switching Time Test Circuit
20
VDS 90%
0 25 50 75 100 125 150
TC , Case Temperature ( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1 D = 0.50 0.20 0.10 0.1 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE)
0.01 0.00001
Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.1 0.001 0.01
P DM t1 t2 1
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRL7N1404
800
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
600
ID 24.6A 35A BOTTOM 55A TOP
VD S
L
D R IV E R
RG
D .U .T.
IA S
400
+ V - DD
A
VGS 20V
tp
0 .0 1
200
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D S S tp
0 25 50 75 100 125 150
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K 12V .2F .3F
QG
10V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
IG
ID
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRL7N1404
Footnotes:
Repetitive Rating; Pulse width limited by
maximum junction temperature. VDD = 25 V, Starting TJ = 25C, L= 0.2mH Peak IAS = 55A, VGS = 10V, RG= 25
ISD 55A, di/dt 166A/s, Pulse width 300 s; Duty Cycle 2%
VDD 55V, TJ 150C
Case Outline and Dimensions -- SMD-1
PAD ASSIGNMENTS
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 04/02
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